Memory Sub-system Performance Modelling Researcher

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Memory Sub-system infrastructure simulation using emerging technology: system technology co-optimization (STCO)

What you will do

As a performance modelling and simulation engineer, you interact closely with device experts, technology experts, circuit as well as major foundry, fabless and EDA partners in imec’s eco-system. This is an exciting opportunity to help drive future system architectures based on imec’s emerging logic and memory technology. In the more than Moore era, memory wall bottlenecks pose imposing challenges to system performance for emerging AI applications. A memory sub-system simulation infrastructure will help model and benchmark the components for future systems, adhering to our System Technology Co-Optimization (STCO) roadmap. We analyze application driven, domain-specific architectures, their emerging usage models and benchmark novel memory technologies in conjunction with our design technology co-optimization (DTCO) research activities.

A performance modelling and simulation researcher will lead pathfinding research activities, encompassing application-architecture-technology co-design framework.

  • Identify memory and communication bottlenecks in modern state-of-the-art SoCs and evaluate the impact of mitigation techniques such as memory-logic partitioning, package level partitioning, chiplet organization, hybrid integration solutions to scale systems more efficiently.
  • Identify emerging applications exhibiting high memory access and compute requirements especially in domain-specific disaggregated computing architectures and map them to acceleration opportunities.
  • Develop a simulation infrastructure spanning across various stages of the memory hierarchy (cache/main memory/storage), performance and technology models; optimize the infrastructure with respect to workload requirements; and propose efficient design of experiments (DoE) to substantiate the simulation methodology.
  • Develop and manage software frameworks, repositories and programs. This also involves maintaining, releasing, documenting and improving existing software by collaborating with partner universities on new features, and testing and evaluating new tools from the community.
  • Keeping up to date on recent developments in the field. You do this by studying literature and interacting with your colleagues.

What we do for you

We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at its headquarters in Leuven, Belgium. With your talent, passion and expertise, you’ll become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow.

We are committed to being an inclusive employer and proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through, 'our corporate university', we actively invest in your development to further your technical and personal growth. 

We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a market appropriate salary with many fringe benefits. 

Who you are

  • The ideal candidate has a PhD in Electrical Engineering, Computer Science, or a masters with at least 3 years relevant industrial experience in memory sub-system architecture and performance modelling, SoC-level communication, workload characterization.
  • You have a good working knowledge of computer architecture and underlying memory hierarchy and hands-on experience with relevant simulation tools like gem5, Ramulator, MQSim.
  • You have software development experience writing high-quality, tested code, preferably in SystemC, python, C/C++.
  • You have a knowledge of application driven performance analysis.
  • Knowledge on Machine learning, domain-specific application and algorithms is appreciated.
  • You have the ambition to drive future technology, proposing innovative ideas and funneling the work on circuit and system-level validation.
  • You have a critical mindset, eager to explore new challenges in future and evolve together with changing R&D demands.
  • You thrive in an open collaborative working culture that provides an opportunity to impact products and roadmaps with your ideas/prototypes/empirical analysis.
  • You are a constructive team player and actively share experience and knowledge with colleagues.
  • Your networking skills, creativity, persistence, and passion for what you do are highly valued.


Memory Sub-system Performance Modelling Researcher
Kapeldreef 75 Löwen, Belgien
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